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ADE7768
TERMINOLOGY
Measurement Error
The error associated with the energy measurement made by the
ADE7768 is defined by the following formula:
ADC Offset Error
This refers to the small dc signal (offset) associated with the
analog inputs to the ADCs. However, the HPF in Channel V1
% Error =
Energy Registered by ADE 7768 ? True Energy
True Energy
× 100 %
eliminates the offset in the circuitry. Therefore, the power
calculation is not affected by this offset.
Frequency Output Error (CF)
Phase Error Between Channels
The high-pass filter (HPF) in the current channel (Channel V1)
has a phase-lead response. To offset this phase response and
equalize the phase response between channels, a phase-
correction network is also placed in Channel V1. The phase-
correction network matches the phase to within 0.1° over a
range of 45 Hz to 65 Hz, and 0.2° over a range 40 Hz to 1 kHz
(see Figure 24 and Figure 25).
Power Supply Rejection (PSR)
This quantifies the ADE7768 measurement error as a
percentage of reading when the power supplies are varied.
For the ac PSR measurement, a reading at nominal supplies
(5 V) is taken. A 200 mV rms/100 Hz signal is then introduced
onto the supplies and a second reading is obtained under the
same input signal levels. Any error introduced is expressed as a
percentage of reading—see the Measurement Error definition.
For the dc PSR measurement, a reading at nominal supplies
(5 V) is taken. The supplies are then varied 5% and a second
reading is obtained with the same input signal levels. Any error
introduced is again expressed as a percentage of the reading.
The frequency output error of the ADE7768 is defined as the
difference between the measured output frequency (minus the
offset) and the ideal output frequency. The difference is
expressed as a percentage of the ideal frequency. The ideal
frequency is obtained from the ADE7768 transfer function.
Gain Error
The gain error of the ADE7768 is defined as the difference
between the measured output of the ADCs (minus the offset)
and the ideal output of the ADCs. The difference is expressed
as a percentage of the ideal of the ADCs.
Oscillator Frequency Tolerance
The oscillator frequency tolerance of the ADE7768 is defined as
the part-to-part frequency variation in terms of percentage at
room temperature (25°C). It is measured by taking the differ-
ence between the measured oscillator frequency and the
nominal frequency defined in the Specifications section.
Oscillator Frequency Stability
Oscillator frequency stability is defined as frequency variation
in terms of the parts-per-million drift over the operating
temperature range. In a metering application, the temperature
range is ?40°C to +85°C. Oscillator frequency stability is
measured by taking the difference between the measured
oscillator frequency at ?40°C and +85°C and the measured
oscillator frequency at +25°C.
Rev. A | Page 6 of 20
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